Cisco SR2016T-NA Reference Manual page 762

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Performance Routing Engine Overview
Figure 4-1
Forwarding Path
The forwarding path (FP) assembly is a unique blend of hardware and microcoded processors that
provides high forwarding rates with considerable flexibility for future growth in packet processing
features. The FP is centered around a pair of PXF network processors, which are custom Cisco-designed
multiprocessor ASICs. Each PXF processor provides a packet processing pipeline that contains
16 microcoded processors, arranged as multiple pipelines.
Each of the 16 processors in a PXF network processor is an eXpress Micro Controller (XMC), which is
an independent, high-performance processor that is customized for packet processing. Each XMC
processor provides a sophisticated dual-instruction-issue execution unit that is programmed to perform
a specific packet-processing task in the most efficient manner. The exact processing function assigned
to each XMC is flexible and can change as new features are added to the Cisco IOS software.
Within each PXF network processor, the 16 XMC processors are linked together in four parallel
pipelines, which each pipeline contains four XMC processors arranged as a systolic array. Each XMC
processor performs its own particular function and then passes its results to its neighboring downstream
processor.
The two PXF network processors are linked to form four parallel packet-processing pipelines, each
containing eight XMC processors in a row. See
Figure 4-2
Packets
in
The PXF network processor architecture in the PRE module allows all 32 XMC processors to process
multiple packets independently and efficiently, yielding high throughput while still allowing substantial
feature processing. The PRE module architecture centralizes the main packet processing, freeing up the
other line cards to perform localized processing.
Cisco Broadband Cable Command Reference Guide
4-2
Performance Routing Engine Block Diagram
Performance routing engine
Route processor
64 to 512 MB
DRAM
Management
interface and
RM 7000
memories
processor
subsystem
Forwarding Path PXF Processor Arrays
PXF network
processor
XMC
XMC
XMC
XMC
XMC
XMC
XMC
XMC
Chapter 4
Forwarding path
PXF network processor
forwarding path
Backplane interface and
buffer management
Links to line cards
Figure
4-2:
PXF network
processor
XMC
XMC
XMC
XMC
XMC
XMC
XMC
XMC
XMC
XMC
XMC
XMC
Commands for the Cisco uBR10012 Router
128 MB
DRAM
packet
XMC
XMC
XMC
XMC
XMC
XMC
XMC
XMC
X MC
XMC
XMC
XMC
Modified
packets
out
OL-1581-08

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