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7.5. Interrupts
When the GPIO function is selected for the port with an interrupt function, the port input interrupt
function can be used.
Interrupt
Interrupt flag
Port input
PPORTPxINTF.PxIFy
PPORTINTFGRP.PxINT
interrupt
Interrupt edge selection
Port input interrupts will occur at the falling edge of the input signal when setting the
PPORTPxINTCTL. PxEDGEy bit to 1, or the rising edge when setting to 0.
Interrupt enable
PPORT provides interrupt enable bits (PPORTPxINTCTL.PxIEy bit) corresponding to each interrupt
flag. An interrupt request is sent to the CPU core only when the interrupt flag, of which interrupt
has been enabled by the interrupt enable bit, is set. For more information on interrupt control, refer
to the "Interrupt" chapter.
Interrupt check in port group unit
When interrupts are enabled in two or more port groups, check the PPORTINTFGRP.PxINT bit in the
interrupt handler first. It helps minimize the handler codes for finding the port that has generated
an interrupt. If this bit is set to 1, an interrupt has occurred in the port group. Next, check the
PPORTPxINTF.PxIFy bit set to 1 in the port group to determine the port that has generated an
interrupt. Clearing the PPORTPxINTF.PxIFy bit also clears the PPORTINTFGRP.PxINT bit. If the port is
set to interrupt disabled status by the PPORTPxINTCTL. PxIEy bit, the PPORTINTFGRP.PxINT bit will
not be set even if the PPORTPxINTF.PxIFy bit is set to 1.
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
Table 7.5.1 Port Input Interrupt Function
Set condition
Rising or falling edge of the input signal
Setting an interrupt flag in the port group
Seiko Epson Corporation
Clear condition
Writing 1
Clearing PPORTPxINTF.PxIFy
7-7
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