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16.4. Operations
16.4.1. Initialization
The I2C Ch.n should be initialized with the procedure shown below.
When using the I2C in master mode
1. Configure the operating clock and the baud rate generator using the I2C_nCLK and I2C_nBR
registers.
2. Assign the I2C Ch.n input/output function to the ports. (Refer to the "I/O Ports" chapter.)
3. Set the following bits when using the interrupt:
Write 1 to the interrupt flags in the I2C_nINTF register.
-
Set the interrupt enable bits in the I2C_nINTE register to 1. (Enable interrupts)
-
4. Set the following I2C_nCTL register bits:
Set the I2C_nCTL.MST bit to 1.
-
Set the I2C_nCTL.SFTRST bit to 1.
-
Set the I2C_nCTL.MODEN bit to 1.
-
When using the I2C in slave mode
1. Set the following I2C_nMOD register bits:
I2C_nMOD.OADR10 bit
-
I2C_nMOD.GCEN bit
-
2. Set its own address to the I2C_nOADR.OADR[9:0] (or OADR[6:0]) bits.
3. Assign the I2C Ch.n input/output function to the ports. (Refer to the "I/O Ports" chapter.)
4. Set the following bits when using the interrupt:
Write 1 to the interrupt flags in the I2C_nINTF register.
-
Set the interrupt enable bits in the I2C_nINTE register to 1. (Enable interrupts)
-
5. Set the following I2C_nCTL register bits:
Set the I2C_nCTL.MST bit to 0.
-
Set the I2C_nCTL.SFTRST bit to 1.
-
Set the I2C_nCTL.MODEN bit to 1.
-
16.4.2. Data Transmission in Master Mode
A data sending procedure in master mode and the I2C Ch.n operations are shown below. Figures 16.4.2.1
and 16.4.2.2 show an operation example and a flowchart, respectively.
Data sending procedure
1. Issue a START condition by setting the I2C_nCTL.TXSTART bit to 1.
2. Wait for a transmit buffer empty interrupt (I2C_nINTF.TBEIF bit = 1) or a START condition interrupt
(I2C_nINTF.STARTIF bit = 1).
Clear the I2C_nINTF.STARTIF bit by writing 1 after the interrupt has occurred.
3. Write the 7-bit slave address to the I2C_nTXD.TXD[7:1] bits and 0 that represents WRITE as the data
transfer direction to the I2C_nTXD.TXD0 bit.
4. (When DMA is used) Configure the DMA controller and set a DMA transfer request enable bit in
the I2C_ nTBEDMAEN register to 1 (DMA transfer request enabled). (This automates the data
sending procedure Steps 5, 6, and 8.)
5. (When DMA is not used) Wait for a transmit buffer empty interrupt (I2C_nINTF.TBEIF bit = 1)
generated when an ACK is received.
6. (When DMA is not used) Write transmit data to the I2C_nTXD register.
7. If a NACK reception interrupt (I2C_nINTF.NACKIF bit = 1) has occurred, go to Step 9 or 1 after
clearing the I2C_nINTF.NACKIF bit.
8. (When DMA is not used) Repeat Steps 5 and 6 until the end of transmit data.
9. Issue a STOP condition by setting the I2C_nCTL.TXSTOP bit to 1.
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
(Set master mode)
(Set 10/7-bit address mode)
(Enable response to general call address)
Seiko Epson Corporation
(Clear interrupt flags)
(Execute software reset)
(Enable I2C Ch.n operations)
(Clear interrupt flags)
(Set slave mode)
(Execute software reset)
(Enable I2C Ch.n operations)
16-5
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