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Epson S1C31D50 Technical Instructions page 308

Cmos 32-bit single chip microcontroller
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18.5. Interrupts
The REMC3 has a function to generate the interrupts shown in Table 18.5.1.
Interrupt
Interrupt flag
Compare AP
REMC3INTF.APIF
Compare DB
REMC3INTF.DBIF
The REMC3 provides interrupt enable bits corresponding to each interrupt flag. An interrupt request is
sent to the CPU core only when the interrupt flag, of which interrupt has been enabled by the interrupt
enable bit, is set. For more information on interrupt control, refer to the "Interrupt" chapter.
18.6. Application Example: Driving EL Lamp
The REMC3 can be used to simply drive an EL lamp as an application example. Figures 18.6.1 and 18.6.2
show an example of an EL lamp drive circuit and an example of the drive waveform generated,
respectively. For details of settings and an example of components, refer to the Application Note
provided separately.
REMO
CLPLS
The REMO and CLPLS signals are output from the respective pins while the REMC3DBCTL.PRUN bit = 1.
The difference between the setting values of the REMC3DBLEN.DBLEN[15:0] bits and
REMC3APLEN.APLEN[15:0] bits becomes the CLPLS pulse width (high period).
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
Table 18.5.1 REMC3 Interrupt Function
Set condition
When the REMC3APLEN register (or
REMC3APLEN buffer) value and the 16-bit
counter for data signal generation are matched
When the REMC3DBLEN register (or
REMC3DBLEN buffer) value and the 16-bit
counter for data signal generation are matched
VDD
S1C31
REMO
REMC3
CLPLS
External components
VSS
Figure 18.6.1 Example of EL Lamp Drive Circuit
REMC3DBLEN.DBLEN[15:0]
REMC3APLEN.APLEN[15:0]
Writing 1 to REMC3DBCTL.PRUN
Figure 18.6.2 Example of Generated Drive Waveform
Seiko Epson Corporation
Writing 1 to the interrupt flag or
the REMC3DBCTL.REMCRST bit
Writing 1 to the interrupt flag or
the REMC3DBCTL.REMCRST bit
L1
VEL = 50–200 V
R1
D1
Q1
R3
R2
Q2
REMC3CARR.CRPER[7:0]
REMC3CARR.CRDTY[7:0]]
Clear condition
+
EL lamp
18-7

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