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Epson S1C31D50 Technical Instructions page 102

Cmos 32-bit single chip microcontroller
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7.7.2. P1 Port Group
The P1 port group consists of seven ports P10–P16 and they support the GPIO and interrupt
functions.
Register name
Bit
PPORTP1DAT
15–8
(P1 Port Data
7–0
Register)
PPORTP1IOEN
15–8
(P1 Port Enable
7–0
Register)
PPORTP1RCTL
15–8
(P1 Port Pull-
7–0
up/down Control
Register)
PPORTP1INTF
15–8
(P1 Port Interrupt
7–0
Flag Register)
PPORTP1INTCTL
15–8
(P1 Port Interrupt
7–0
Control Register)
PPORTP1CHATEN
15–8
(P1 Port Chattering
7–0
Filter Enable
Register)
PPORTP1MODSEL
15–8
(P1 Port Mode
7–0
Select Register)
PPORTP1FNCSEL
15–14
(P1 Port Function
13–12
Select Register)
11–10
9–8
7–6
5–4
3–2
1–0
P1SELy = 0
Port
name
GPIO
Peripheral
P10
P10
P11
P11
P12
P12
P13
P13
P14
P14
P15
P15
P16
P16
P17
P17
*1: Refer to the "Universal Port Multiplexer" chapter.
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
Table 7.7.2.1 Control Registers for P1 Port Group
Bit name
Initial
P1OUT[7:0]
0x00
P1IN[7:0]
0x00
P1IEN[7:0]
0x00
P1OEN[7:0]
0x00
P1PDPU[7:0]
0x00
P1REN[7:0]
0x00
0x00
P1IF[7:0]
0x00
P1EDGE[7:0]
0x00
P1IE[7:0]
0x00
0x00
P1CHATEN[7:0]
0x00
0x00
P1SEL[7:0]
0x00
P17MUX[1:0]
P16MUX[1:0]
P15MUX[1:0]
P14MUX[1:0]
P13MUX[1:0]
P12MUX[1:0]
P11MUX[1:0]
P10MUX[1:0]
Table 7.7.2.2 P1 Port Group Function Assignment
P1yMUX = 0x0
P1yMUX = 0x1
(Function 0)
(Function 1)
Pin
Peripheral
UPMUX
UPMUX
UPMUX
UPMUX
UPMUX
UPMUX
UPMUX
UPMUX
Seiko Epson Corporation
Reset
R/W
H0
R/W
H0
R
H0
R/W
H0
R/W
H0
R/W
H0
R/W
R
H0
R/W
H0
R/W
H0
R/W
R
H0
R/W
R
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
P1SELy = 1
P1yMUX = 0x2
(Function 2)
Pin
Peripheral
*1
ADC12A
*1
ADC12A
*1
ADC12A
*1
ADC12A
*1
ADC12A
*1
ADC12A
*1
ADC12A
*1
ADC12A
Remarks
Cleared by writing 1.
P1yMUX = 0x3
(Function 3)
Pin
Peripheral
Pin
ADIN7
ADIN6
ADIN5
ADIN4
ADIN3
ADIN2
ADIN1
ADIN0
7-15

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