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Epson S1C31D50 Technical Instructions page 44

Cmos 32-bit single chip microcontroller
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Clock control in SLEEP mode
Whether the clock sources being operated are stopped or not when the CPU enters SLEEP mode
(deep sleep mode) can be selected in each source individually. This allows the CPU to fast switch
between SLEEP mode and RUN mode, and the peripheral circuits to continue operating without
disabling the clock in SLEEP mode. The CLGOSC.IOSCSLPC, CLGOSC.OSC1SLPC, CLGOSC.OSC3SLPC,
and CLGOSC.EXOSCSLPC bits are used for this control.
Figure 2.3.4.3 shows a control example.
When the CLGOSC.OSC1SLPC bit = 1
(1)
SYSCLK
(CPU operating clock)
Real-time clock
operating clock
When the CLGOSC.OSC1SLPC bit = 0
(2)
SYSCLK
(CPU operating clock)
Real-time clock
operating clock
The SYSCLK condition (clock source and division ratio) at wake-up from SLEEP mode to RUN mode
can also be configured. This allows flexible clock control according to the wake-up process.
Configure the clock using the CLGSCLK.WUPSRC[1:0] and CLGSCLK.WUPDIV[1:0] bits, and write 1 to
the CLGSCLK.WUPMD bit to enable this function.
When the CLGSCLK.WUPMD bit = 0
(1)
SYSCLK
(CPU operating clock)
Real-time clock
operating clock
When the CLGSCLK.WUPMD bit = 1 and the CLGSCLK.WUPSRC[1:0] bits = 0x0
(2)
SYSCLK
(CPU operating clock)
Real-time clock
operating clock
2-16
IOSCCLK
Executing the WFI/WFE instruction
(SLEEPDEEP bit = 1)
OSC1CLK
* The real-time clock is turned off in
SLEEP mode as the clock stops.
IOSCCLK
Executing the WFI/WFE instruction
(SLEEPDEEP bit = 1)
* The real-time clock keeps operating in
SLEEP mode as the clock is being supplied..
Figure 2.3.4.3 Clock Control Example in SLEEP Mode
IOSCCLK
Executing the WFI/WFE instruction
(SLEEPDEEP bit = 1)
OSC1CLK
* The real-time clock is turned off in
IOSCCLK
Executing the WFI/WFE instruction
(SLEEPDEEP bit = 1)
* The real-time clock keeps operating in
SLEEP mode as the clock is being supplied..
Figure 2.3.4.4 Clock Control Example in SLEEP Mode
Seiko Epson Corporation
SLEEP mode
IOSCCLK
(Unstable)
(CPU stop, CLK stop)
Executing the WFI/WFE instruction
(SLEEPDEEP bit = 1)
(CLK stop)
SLEEP mode
IOSCCLK
(Unstable
(CPU stop, CLK stop)
Executing the WFI/WFE instruction
(SLEEPDEEP bit = 1)
OSC1CLK
SLEEP mode
IOSCCLK
(Unstable)
(CPU stop, CLK stop)
Executing the WFI/WFE instruction
(SLEEPDEEP bit = 1)
(CLK stop)
SLEEP mode as the clock stops.
IOSCCL
SLEEP mode
(CPU stop, CLK stop)
(Unstable
Executing the WFI/WFE instruction
(SLEEPDEEP bit = 1)
OSC1CLK
IOSCCLK
OSC1CLK
OSC1CLK
(Unstable)
IOSCCLK
IOSCCLK
OSC1CLK
OSC1CLK
(Unstable)
K
IOSCCLK
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)

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