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QFP15-100pin
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
#RESET 76
VDD 77
OSC1 78
OSC2 79
P56 80
P57 81
P80 82
P81 83
P82 84
P83/EXOSC 85
P84/EXCL00 86
P85/EXCL01 87
P86 88
P87 89
P70 90
P71 91
P72/EXCL10 92
P73/EXCL11 93
P74 94
P75 95
SWCLK/PD0 96
SWD/PD1 97
TEST 98
P76 99
P77
100
1
Figure 1.3.1.4 S1C31D50 Pin Configuration Diagram (QFP15-100)
1-8
QFP15-100
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
Seiko Epson Corporation
50 P60
49 P47
48 P46/RTC1S
47 P45/#ADTRG
46 P44
45 P43
44 P42
43 P41
42 P40/VREFA
41 P17/UPMUX/ADIN0
40 P16/UPMUX/ADIN1
39 P15/UPMUX/ADIN2
38 P14/UPMUX/ADIN3
37 P13/UPMUX/ADIN4
36 P12/UPMUX/ADIN5
35 P11/UPMUX/ADIN6
34 P10/UPMUX/ADIN7
33 P07/UPMUX
32 P06/UPMUX
31 P05/UPMUX
30 P04/UPMUX
29 P03/UPMUX
28 P02/UPMUX
27 P01/UPMUX
26 P00/UPMUX
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
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