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Epson S1C31D50 Technical Instructions page 43

Cmos 32-bit single chip microcontroller
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Oscillation start procedure for the OSC3 oscillator circuit
Crystal/ceramic mode
Follow the procedure shown below to start oscillation of the OSC3 oscillator circuit.
1. Write 1 to the CLGINTF.OSC3STAIF bit.
2. Write 1 to the CLGINTE.OSC3STAIE bit.
3. Write 0x0096 to the SYSPROT.PROT[15:0] bits.
4. Configure the following CLGOSC3 register bits.
CLGOSC3.OSC3WT[2:0] bits
-
CLGOSC3.OSC3INV[1:0] bits
-
CLGOSC3.OSC3MD bits
-
5. Write a value other than 0x0096 to the SYSPROT.PROT[15:0] bits.
6. Assign the OSC3 oscillator input/output functions to the ports.
7. Write 1 to the CLGOSC.OSC3EN bit.
8. OSC3CLK can be used if the CLGINTF.OSC3STAIF bit = 1 after an interrupt occurs.
The setting values of the CLGOSC3.OSC3INV[1:0] and CLGOSC3.OSC3WT[2:0] bits should be
determined after performing evaluation using the populated circuit board.
Internal Oscillation
Follow the procedure shown below to start oscillation of the OSC3 oscillator circuit.
1. Write 1 to the CLGINTF.OSC3STAIF bit.
2. Write 1 to the CLGINTE.OSC3STAIE bit.
3. Write 0x0096 to the SYSPROT.PROT[15:0] bits.
4. Configure the following CLGOSC3 register bits.
CLGOSC3.OSC3WT[2:0] bits
-
CLGOSC3.OSC3MD bits
-
5. Write a value other than 0x0096 to the SYSPROT.PROT[15:0] bits.
6. Write 1 to the CLGOSC.OSC3EN bit.
7. OSC3CLK can be used if the CLGINTF.OSC3STAIF bit = 1 after an interrupt occurs.
System clock switching
The CPU boots using IOSCCLK as SYSCLK. After booting, the clock source of SYSCLK can be switched
ac- cording to the processing speed required. The SYSCLK frequency can also be set by selecting the
clock source division ratio, this makes it possible to run the CPU at the most suitable performance
for the process to be executed. The CLGSCLK.CLKSRC[1:0] and CLGSCLK.CLKDIV[1:0] bits are used for
this control.
The CLGSCLK register bits are protected against writings by the system protect function, therefore, the
system protection must be removed by writing 0x0096 to the SYSPROT.PROT[15:0] bits before the register
setting can be altered. For the transition between the operating modes including the system clock
switching, refer to "Operating Mode."
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
(Clear interrupt flag)
(Enable interrupt)
(Remove system protection)
(Set oscillation stabilization waiting time)
(Set oscillation inverter gain)
(Set crystal/ceramic oscillation mode)
(Set system protection)
(Refer to the "I/O Ports" chapter.)
(Start oscillation)
(Clear interrupt flag)
(Enable interrupt)
(Remove system protection)
(Set oscillation stabilization waiting time)
(Set CR oscillation mode)
(Set system protection)
(Start oscillation)
Seiko Epson Corporation
2-15

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