Epson S1C31D50 Technical Instructions page 104

7.7.4. P3 Port Group
The P3 port group consists of seven ports P30–P36 and they support the GPIO and interrupt functions.
Register name Bit
PPORTP3DAT 15–8
(P3 Port Data
7–0
Register)
PPORTP3IOEN 15–8
(P3 Port Enable
7–0
Register)
PPORTP3RCTL 15–8
(P3 Port Pull- 7–0
up/down Control
Register)
PPORTP3INTF 15–8
(P3 Port Interrupt 7–0
Flag Register)
PPORTP3INTCTL 15–8
(P3 Port Interrupt 7–0
Control Register)
PPORTP3CHATEN 15–8
(P3 Port Chattering 7–0
Filter Enable
Register)
PPORTP3MODSEL 15–8
(P3 Port Mode 7–0
Select Register)
PPORTP3FNCSEL 15–14
(P3 Port Function 13–12
Select Register)
11–10
9–8
7–6
5–4
3–2
1–0
P3SELy = 0
Port
name GPIO
Peripheral
P30 P30
P31 P31 REMC3
P32 P32 REMC3
P33 P33
P34 P34
P35 P35
P36 P36
P37 P37
*1: Refer to the "Universal Port Multiplexer" chapter.
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
Table 7.7.4.1 Control Registers for P3 Port Group
Bit name Initial
P3OUT[7:0] 0x00
P3IN[7:0] 0x00
P3IEN[7:0] 0x00
P3OEN[7:0] 0x00
P3PDPU[7:0] 0x00
P3REN[7:0] 0x00
– 0x00
P3IF[7:0] 0x00
P3EDGE[7:0] 0x00
P3IE[7:0] 0x00
– 0x00
P3CHATEN[7:0] 0x00
– 0x00
P3SEL[7:0] 0x00
P37MUX[1:0]
P36MUX[1:0]
P35MUX[1:0]
P34MUX[1:0]
P33MUX[1:0]
P32MUX[1:0]
P31MUX[1:0]
P30MUX[1:0]
Table 7.7.4.2 P3 Port Group Function Assignment
P3yMUX = 0x0 P3yMUX = 0x1
(Function 0) (Function 1)
Pin Peripheral
RFC RFCLKO0 UPMUX
REMO UPMUX
CLPLS UPMUX
– – UPMUX
– – UPMUX
– – UPMUX
– – UPMUX
– – UPMUX
Seiko Epson Corporation
Reset R/W
H0 R/W
H0 R
H0 R/W
H0 R/W
H0 R/W
H0 R/W
– R
H0 R/W
H0 R/W
H0 R/W
– R
H0 R/W
– R
H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
P3SELy = 1
P3yMUX = 0x2
(Function 2)
Pin Peripheral
*1 –
*1 –
*1 –
*1 –
*1 –
*1 –
*1 –
*1 –
Remarks
–
–
–
–
Cleared by writing 1.
–
–
–
–
P3yMUX = 0x3
(Function 3)
Pin Peripheral Pin
– – –
– – –
– – –
– – –
– – –
– – –
– – –
– – –
7-17