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RFC Ch.n Oscillation Trigger Register
Register name
Bit
RFC_nTRG
15–8
7–3
2
1
0
Bits 15–3 Reserved
Bit 2
SSENB
This bit controls CR oscillation for sensor B. This bit also indicates the CR oscillation status.
1 (W):
0 (W):
1 (R):
0 (R):
Note:
Writing 1 to the RFC_nTRG.SSENB bit does not start oscillation when the RFC_nCTL.
Bit 1
SSENA
This bit controls CR oscillation for sensor A. This bit also indicates the CR oscillation status.
1 (W):
0 (W):
1 (R):
0 (R):
Bit 0
SREF
This bit controls CR oscillation for the reference resistor. This bit also indicates the CR
oscillation status.
1 (W):
0 (W):
1 (R):
0 (R):
Notes:
•
Settings in this register are all ineffective when the RFC_nCTL.MODEN bit = 0 (RFC operation
disabled).
•
When writing 1 to the RFC_nTRG.SREF bit, the RFC_nTRG.SSENA bit, or the RFC_nTRG.
SSENB bit to start oscillation, be sure to avoid having more than one bit set to 1.
•
Be sure to clear the interrupt flags (RFC_nINTF.EREFIF bit, RFC_nINTF.ESENAIF bit,
RFC_nINTF.ESENBIF bit, RFC_nINTF.OVMCIF bit, and RFC_nINTF.OVTCIF bit) before starting
oscillation using this register.
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
Bit name
Initial
–
0x00
–
0x00
SSENB
0
SSENA
0
SREF
0
Start oscillation
Stop oscillation
Being oscillated
Stopped
Start oscillation
Stop oscillation
Being oscillated
Stopped
Start oscillation
Stop oscillation
Being oscillated
Stopped
Seiko Epson Corporation
Reset
R/W
–
R
–
R
H0
R/W
H0
R/W
H0
R/W
Remarks
–
20-11
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