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UART3_2INTF
(UART3 Ch.2
0x0020
Status and
062c
Interrupt Flag
Register)
UART3_2INTE
0x0020
(UART3 Ch.2
062e
Interrupt Enable
Register)
UART3_2
TBEDMAEN
(UART3 Ch.2
0x0020
Transmit Buffer
0630
Empty DMA
Request Enable
Register)
UART3_2
RB1FDMAEN
(UART3 Ch.2
0x0020
Receive Buffer
0632
One Byte Full
DMA Request
Enable Register)
UART3_2CAWF
0x0020
(UART3 Ch.2
0634
Carrier Waveform
Register)
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
15–10
–
9
RBSY
8
TBSY
7
–
6
TENDIF
5
FEIF
4
PEIF
3
OEIF
2
RB2FIF
1
RB1FIF
0
TBEIF
15–8
–
7
–
6
TENDIE
5
FEIE
4
PEIE
3
OEIE
2
RB2FIE
1
RB1FIE
0
TBEIE
15–8
–
7–4
–
3–0
TBEDMAEN[3:0]
15–8
–
7–4
–
3–0
RB1FDMAEN[3:0]
15–8
–
7–0
CRPER[7:0]
Seiko Epson Corporation
0x00
–
R
0
H0/S0
R
–
0
H0/S0
R
0
–
R
Cleared by
0
H0/S0
R/W
writing 1.
Cleared by
0
H0/S0
R/W
writing 1 or
reading the
0
H0/S0
R/W
UART3_2RXD
register.
Cleared by
0
H0/S0
R/W
writing 1.
0
H0/S0
R
Cleared by
reading the
UART3_2RXD
0
H0/S0
R
register.
Cleared by
writing to the
1
H0/S0
R
UART3_2TXD
register.
0x00
–
R
0
–
R
0
H0
R/W
0
H0
R/W
0
H0
R/W
–
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0x00
–
R
0x0
–
R
–
0x0
H0
R/W
0x00
–
R
0x0
–
R
–
0x0
H0
R/W
0x00
–
R
–
0x00
H0
R/W
B-43
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