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1.
Overview ________________________________________________________ 1-1
1.1.
Features ___________________________________________________________ 1-1
1.2.
Block Diagram ______________________________________________________ 1-4
1.3.
Pins_______________________________________________________________ 1-5
1.3.1.
Pin Configuration Diagram ________________________________________________ 1-5
1.3.2.
Pin Descriptions ________________________________________________________ 1-9
2.
Power Supply, Reset, and Clocks _____________________________________ 2-1
2.1.
Power Generator (PWGA) _____________________________________________ 2-1
2.1.1.
Overview ______________________________________________________________ 2-1
2.1.2.
Pins __________________________________________________________________ 2-2
2.1.3.
VD1 Regulator Operation Mode ___________________________________________ 2-2
2.1.4.
VD1 Regulator Voltage Mode _____________________________________________ 2-3
2.2.
System Reset Controller (SRC) _________________________________________ 2-4
2.2.1.
Overview ______________________________________________________________ 2-4
2.2.2.
Input Pin ______________________________________________________________ 2-4
2.2.3.
Reset Sources __________________________________________________________ 2-5
2.2.4.
Initialization Conditions (Reset Groups) ______________________________________ 2-6
2.3.
Clock Generator (CLG) ________________________________________________ 2-7
2.3.1.
Overview ______________________________________________________________ 2-7
2.3.2.
Input/Output Pins ______________________________________________________ 2-8
2.3.3.
Clock Sources __________________________________________________________ 2-9
2.3.4.
Operations ___________________________________________________________ 2-12
2.4.
Operating Mode ___________________________________________________ 2-18
2.4.1.
Initial Boot Sequence ___________________________________________________ 2-18
2.4.2.
Transition between Operating Modes______________________________________ 2-18
2.5.
Interrupts ________________________________________________________ 2-20
2.6.
Control Registers ___________________________________________________ 2-21
3.
CPU AND DEBUGGER ______________________________________________ 3-1
3.1.
Overview __________________________________________________________ 3-1
3.2.
CPU Core __________________________________________________________ 3-1
3.3.
Debugger __________________________________________________________ 3-1
3.3.1.
List of debugger input/output pins _________________________________________ 3-1
3.3.2.
External Connection _____________________________________________________ 3-1
4.
Memory and Bus __________________________________________________ 4-1
4.1.
Overview __________________________________________________________ 4-1
4.2.
Bus Access Cycle ____________________________________________________ 4-2
4.3.
Flash Memory ______________________________________________________ 4-3
4.3.1.
Flash Memory Pin _______________________________________________________ 4-3
4.3.2.
Flash Bus Access Cycle Setting _____________________________________________ 4-3
4.3.3.
Flash Programming ______________________________________________________ 4-3
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
Seiko Epson Corporation
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