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Epson S1C31D50 Technical Instructions page 372

Cmos 32-bit single chip microcontroller
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21.5.11.
Memory Check Function Registers
Memory Check Function has the following registers.
FUNCTION
INTMASK
MEMADDR
MEMSIZE
INITVALUE
COMMAND
STATE
ERROR
STATUS
PROCESSING
-
READY
-
RESULT
VERSION
Table 21.5.11.1 shows Memory Check Function registers.
21-34
(W)
cortex sets the Function
(W)
cortex sets Memory Check Interrupt Mask
The interrupt by states transition can be controlled.
(W)
cortex sets Target Memory Start Address to check
To check external QSPI-Flash, the memory mapped access mode
should be used. For detail, please refer in "15.5.2. Memory
Mapped Access Mode".
(W)
cortex sets Target Memory Size to check
(W)
cortex sets Initialization Value for Checksum or CRC
Please set 0x00000000 before start "FLASH CHECKSUM" or "FLASH
CRC".
(W)
cortex sets command
Please set "Memory Check" command.
(R)
cortex reads State
Please check State to set next command.
(R)
cortex reads HW Processor Error
(R)
cortex reads HW Processor Status
cortex reads HW Processor status whether processing or finish
cortex reads HW Processor status whether ready or busy
cortex can set the command ready status.
(R)
cortex reads HW Processor Result
(R)
cortex reads HW Processor Version
Seiko Epson Corporation
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)

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