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CLGOSC
15–12
11
10
9
8
7–4
3
2
1
0
Bits 15–12
Reserved
Bit 11
EXOSCSLPC
Bit 10
OSC3SLPC
Bit 9
OSC1SLPC
Bit 8
IOSCSLPC
These bits control the clock source operations in SLEEP mode.
1 (R/W):
0 (R/W):
Each bit corresponds to the clock source as follows:
CLGOSC.EXOSCSLPC bit: EXOSC clock input
CLGOSC.OSC3SLPC bit: OSC3 oscillator circuit
CLGOSC.OSC1SLPC bit: OSC1 oscillator circuit
CLGOSC.IOSCSLPC bit:
Bits 7–4
Reserved
Bit 3
EXOSCEN
Bit 2
OSC3EN
Bit 1
OSC1EN
Bit 0
IOSCEN
These bits control the clock source operation.
1(R/W):
0(R/W):
Each bit corresponds to the clock source as follows:
CLGOSC.EXOSCEN bit:
CLGOSC.OSC3EN bit:
CLGOSC.OSC1EN bit:
CLGOSC.IOSCEN bit:
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
–
0x0
EXOSCSLPC
1
OSC3SLPC
1
OSC1SLPC
1
IOSCSLPC
1
–
0x0
EXOSCEN
0
OSC3EN
0
OSC1EN
0
IOSCEN
1
Stop clock source in SLEEP mode
Continue operation state before SLEEP
IOSC oscillator circuit
Start oscillating or clock input
Stop oscillating or clock input
EXOSC clock input
OSC3 oscillator circuit
OSC1 oscillator circuit
IOSC oscillator circuit
Seiko Epson Corporation
–
R
H0
R/W
H0
R/W
H0
R/W
H0
R/W
–
R
H0
R/W
H0
R/W
H0
R/W
H0
R/W
–
2-23
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