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CLG OSC3 Control Register
Register name
Bit
CLGOSC3
15–12
11-10
9
8–6
5–4
3
2–0
Bits 15–12
Reserved
Bits 11–10
OSC3FQ[1:0]
These bits set OSC3 CR(Int) mode freqency select.
Bit 9
OSC3MD
This bit set OSC3 mode select.
Bits 8-6
Reserved
Bits 5–4
OSC3INV[1:0]
These bits set the oscillation inverter gain when crystal/ceramic oscillator is selected as the
OSC3 oscillator type.
Bit 3
OSC3STM
This bit controls the OSC3CLK auto-trimming function.
1 (WP): Start trimming
0 (WP): Stop trimming
1 (R):
0 (R):
This bit is automatically cleared to 0 when trimming has finished.
Notes: •
The auto-trimming function does not work if the OSC1 oscillator circuit is stopped.
Make
sure the CLGINTF.OSC1STAIF bit is set to 1 before starting the trimming operation.
Be sure to avoid altering the CLGIOSC.OSC3FQ[1:0] bits while the auto-trimming is
being
executed.
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
Bit name
Initial
–
0x00
OSC3FQ[1:0]
0x1
OSC3MD
0x0
–
0x0
OSC3INV[1:0]
0x3
OSC3STM
OSC3WT[2:0]
0x6
Table 2.6.9 OSC3 frequency
OSC3FQ [1:0] bits
0x3
0x2
0x1
0x0
Table 2.6.10 mode select
OSC3MD
0x1
0x0
Table 2.6.11 OSC3 Oscillation Inverter Gain Setting
CLGOSC3.OSC3INV[1:0] bits
0x3
0x2
0x1
0x0
Trimming is executing.
Trimming has finished. (Trimming operation inactivated.)
Seiko Epson Corporation
Reset
R/W
–
R
H0
R/WP
H0
R/WP
–
R
H0
R/WP
0
H0
R/WP
H0
R/WP
OSC3 frequency
16 MHz
-
8 MHz
4 MHz
Mode
X'tal
CR(Int)
Inverter gain
Max.
↑
↓
Min.
Remarks
–
2-27
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