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Epson S1C31D50 Technical Instructions page 333

Cmos 32-bit single chip microcontroller
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20.5. Interrupts
The RFC has a function to generate the interrupts shown in Table 20.5.1.
Interrupt
Reference oscillation
RFC_nINTF.EREFIF
completion
Sensor A oscillation
RFC_nINTF.ESENAIF
completion
Sensor B oscillation
RFC_nINTF.ESENBIF
completion
Measurement
RFC_nINTF.OVMCIF
counter overflow
error
Time base counter
RFC_nINTF.OVTCIF
overflow error
The RFC provides interrupt enable bits corresponding to each interrupt flag. An interrupt request is sent
to the CPU core only when the interrupt flag, of which interrupt has been enabled by the interrupt
enable bit, is set. For more information on interrupt control, refer to the "Interrupt" chapter.
20-8
Table 20.5.1 RFC Interrupt Function
Interrupt flag
When reference oscillation has been completed
normally due to a measurement counter overflow
When sensor A oscillation has been completed
normally due to the time base counter reaching
0x000000
When sensor B oscillation has been completed
normally due to the time base counter reaching
0x000000
When sensor oscillation has been terminated
abnormally due to a measurement counter overflow
When reference oscillation has been terminated
abnormally due to a time base counter overflow
Seiko Epson Corporation
Set condition
S1C31D50 TECHNICAL MANUAL
Clear
condition
Writing 1
Writing 1
Writing 1
Writing 1
Writing 1
(Rev. 1.00)

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