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UART3 Ch.n Mode Register
Register name
Bit
UART3_nMOD
15–13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bits 15–13 Reserved
Bit 12
PECAR
This bit selects the carrier modulation period.
1 (R/W): Carrier modulation during H data period
0 (R/W): Carrier modulation during L data period
Bit 11
CAREN
This bit enables the carrier modulation function.
1 (R/W): Enable carrier modulation function
0 (R/W): Disable carrier modulation function
Bit 10
BRDIV
This bit sets the UART3 operating clock division ratio for generating the transfer
(sampling) clock using the baud rate generator.
1 (R/W): 1/4
0 (R/W): 1/16
Bit 9
INVRX
This bit enables the USINn input inverting function.
1 (R/W): Enable input inverting function
0 (R/W): Disable input inverting function
Bit 8
INVTX
This bit enables the USOUTn output inverting function.
1 (R/W): Enable output inverting function
0 (R/W): Disable output inverting function
Bit 7
Reserved
Bit 6
PUEN
This bit enables pull-up of the USINn pin.
1 (R/W): Enable pull-up
0 (R/W): Disable pull-up
Bit 5
OUTMD
This bit sets the USOUTn pin output mode.
1 (R/W): Open-drain output
0 (R/W): Push-pull output
Bit 4
IRMD
This bit enables the IrDA interface function.
1 (R/W): Enable IrDA interface function
0 (R/W): Disable IrDA interface function
13-14
Bit name
Initial
Reset
–
0x0
PECAR
0
CAREN
0
BRDIV
0
INVRX
0
INVTX
0
–
0
PUEN
0
OUTMD
0
IRMD
0
CHLN
0
PREN
0
PRMD
0
STPB
0
Seiko Epson Corporation
R/W
–
R
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
–
R
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
S1C31D50 TECHNICAL MANUAL
Remarks
–
(Rev. 1.00)
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