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Epson S1C31D50 Technical Instructions page 130

Cmos 32-bit single chip microcontroller
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Bit 2
RTCADJ
This bit executes the 30-second correction time adjustment function.
1 (W): Execute 30-second correction
0 (W): Ineffective
1 (R): 30-second correction is executing.
0 (R): 30-second correction has finished. (Normal operation)
Writing 1 to this bit executes 30-second correction and an enabled interrupt occurs
even if the RT- CACTLL.RTCRUN bit = 0. The correction takes up to 2/256 seconds. The
RTCACTLL.RTCADJ bit is automatically cleared to 0 when the correction has finished. For
more information on the 30-second correction, refer to "Real-Time Clock Counter
Operations."
Notes:
Be sure to avoid writing to this bit when the RTCACTLL.RTCBSY bit = 1.
Do not write 1 to this bit again while the RTCACTLL.RTCADJ bit = 1.
Bit 1
RTCRST
This bit resets the 1 Hz counter, the RTCACTLL.RTCADJ bit, and the RTCACTLL.RTCHLD bit.
1 (W): Reset
0 (W): Ineffective
1 (R): Reset is being executed.
0 (R): Reset has finished. (Normal operation)
This bit is automatically cleared to 0 after reset has finished.
Bit 0
RTCRUN
This bit starts/stops the real-time clock counter.
1 (R/W): Running/start control
0 (R/W): Idle/stop control
When the real-time clock counter stops counting by writing 0 to this bit, the counter
retains the value when it stopped. Writing 1 to this bit again resumes counting from the
value retained.
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
Seiko Epson Corporation
10-9

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