Epson S1C31D50 Technical Instructions page 111

7.7.11. PA Port Group
The PA port group consists of seven ports PA0–PA6 and they support the GPIO and interrupt functions.
Register name Bit
PPORTPADAT 15
(PA Port Data 14–8
Register)
7
6–0
PPORTPAIOEN 15
(PA Port Enable
14–8
Register)
7
6–0
PPORTPARCTL 15
(PA Port Pull-
14–8
up/down Control
7
Register)
6–0
PPORTPAINTF 15–8
(PA Port Interrupt 7
Flag Register)
6–0
PPORTPAINTCTL 15
(PA Port Interrupt 14–8
Control Register)
7
6–0
PPORTPACHATEN 15–8
(PA Port Chattering
7
Filter Enable
6–0
Register)
PPORTPAMODSEL 15–8
(PA Port Mode
7
Select Register)
6–0
PPORTPAFNCSEL 15–14
(PA Port Function 13–12
Select Register)
11–10
9–8
7–6
5–4
3–2
1–0
PASELy = 0
Port
PAyMUX = 0x0
name GPIO
Peripheral
PA0 PA0
PA1 PA1
PA2 PA2
PA3 PA3 CLG
PA4 PA4
PA5 PA5
PA6 PA6
7-24
Table 7.7.11.1 Control Registers for P5 Port Group
Bit name Initial
– 0
PAOUT[6:0] 0x00
– 0
PAIN[6:0] 0x00
– 0
PAIEN[6:0] 0x00
– 0
PAOEN[6:0] 0x00
– 0
PAPDPU[6:0] 0x00
– 0
PAREN[6:0] 0x00
– 0x00
– 0
PAIF[6:0] 0x00
– 0
PAEDGE[6:0] 0x00
– 0
PAIE[6:0] 0x00
– 0x00
– 0
PACHATEN[6:0] 0x00
– 0x00
– 0
PASEL[6:0] 0x00
– 0x0
PA6MUX[1:0] 0x0
PA5MUX[1:0] 0x0
PA4MUX[1:0] 0x0
PA3MUX[1:0] 0x0
PA2MUX[1:0] 0x0
PA1MUX[1:0] 0x0
PA0MUX[1:0] 0x0
Table 7.7.11.2 PA Port Group Function Assignment
PAyMUX = 0x1
(Function 0) (Function 1)
Pin Peripheral
– – –
– – –
– – –
FOUT –
– – –
– – –
– – –
Seiko Epson Corporation
Reset R/W
– R
H0 R/W
– R
H0 R
– R
H0 R/W
– R
H0 R/W
– R
H0 R/W
– R
H0 R/W
– R
– R
H0 R/W Cleared by writing 1.
– R
H0 R/W
– R
H0 R/W
– R
– R
H0 R/W
– R
– R
H0 R/W
– R
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
PASELy = 1
PAyMUX = 0x2
(Function 2)
Pin Peripheral Pin
– – –
– – –
– – –
– – –
– – –
– – –
– – –
Remarks
–
–
–
–
–
–
–
–
PAyMUX = 0x0
(Function 0)
Peripheral Pin
– –
– –
– –
– –
– –
– –
– –
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)