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0x0020 0720–0x0020 0732
Address
Register name
REMC3CLK
0x0020
(REMC3 Clock
0720
Con- trol
Register)
REMC3DBCTL
0x0020
(REMC3 Data Bit
0722
Counter Control
Register)
REMC3DBCNT
0x0020
(REMC3 Data Bit
0724
Counter Register)
REMC3APLEN
0x0020
(REMC3 Data Bit
0726
Active Pulse
Length Register)
REMC3DBLEN
0x0020
(REMC3 Data Bit
0728
Length Register)
REMC3INTF
0x0020
(REMC3 Status
072a
and Interrupt
Flag Register)
REMC3INTE
0x0020
(REMC3 Interrupt
072c
Enable Register)
REMC3CARR
0x0020
(REMC3 Carrier
0730
Waveform
Register)
REMC3CCTL
0x0020
(REMC3 Carrier
0732
Modulation
Control Register)
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
IR Remote Controller (REMC3)
Bit
Bit name
15–9
–
8
DBRUN
7–4
CLKDIV[3:0]
3–2
–
1–0
CLKSRC[1:0]
15–10
–
9
PRESET
8
PRUN
7–5
–
4
REMOINV
3
BUFEN
2
TRMD
1
REMCRST
0
MODEN
15–0
DBCNT[15:0]
15–0
APLEN[15:0]
15–0
DBLEN[15:0]
15–11
–
10
DBCNTRUN
9
DBLENBSY
8
APLENBSY
7–2
–
1
DBIF
0
APIF
15–8
–
7–2
–
1
DBIE
0
APIE
15–8
CRDTY[7:0]
7–0
CRPER[7:0]
15–9
–
8
OUTINVEN
7–1
–
0
CARREN
Seiko Epson Corporation
Initial
Reset
R/W
0x00
–
R
0
H0
R/W
0x0
H0
R/W
0x0
–
R
0x0
H0
R/W
0x00
–
R
0
H0/S0
R/W
0
H0/S0
R/W
0x0
–
R
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
W
0
H0
R/W
0x0000
H0/S0
R
0x0000
H0
R/W
0x0000
H0
R/W
0x00
–
R
0
H0/S0
R
0
H0
R
0
H0
R
0x00
–
R
0
H0/S0
R/W
0
H0/S0
R/W
0x00
–
R
0x00
–
R
0
H0
R/W
0
H0
R/W
0x00
H0
R/W
0x00
H0
R/W
0x00
–
R
0
H0
R/W
0x00
–
R
0
H0
R/W
Remarks
–
–
Cleared by writing 1 to
the
REMC3DBCTL.REMCRST
bit.
–
Cleared by writing 1 to
the
REMC3DBCTL.REMCRST
bit.
Writing enabled when
REMC3DBCTL.MODEN
bit
1
Writing enabled when
REMC3DBCTL.MODEN
bit
1
–
Cleared by writing 1 to
the
REMC3DBCTL.REMCRST
bit.
Effective when the
REMC3DBCTL.BUFEN bit
= 1.
–
Cleared by writing 1 to
this bit or the
REMC3DBCTL. REMCRST
bit.
–
–
–
B-53
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