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Figure 13.1.1 shows the UART3 configuration.
Item
Number of channels
Clock generator
Interrupt
controller
DMA controller
13.2. Input/Output Pins and External Connections
13.2.1. List of Input/Output Pins
Table 13.2.1.1 lists the UART3 pins.
Pin name
USINn
USOUTn
If the port is shared with the UART3 pin and other functions, the UART3 input/output function must be
assigned to the port before activating the UART3. For more information, refer to the "I/O Ports" chapter.
13-2
Table 13.1.1 UART3 Channel Configuration of S1C31D50
UART3 Ch.n
Baud rate
CLK_UART3_n
generator
CLKSRC[1:0]
CLKDIV[1:0]
DBRUN
MODEN
Transmit/receive
control circuit
Receive data buffer
Shift register
RXD[7:0]
Transmit data
buffer
Shift register
TXD[7:0]
TENDIE
FEIE
Interrupt
PEIE
control circuit
OEIE
RB2FIE
RB1FIE
TBEIE
DMA request
control circuit
Figure 13.1.1 UART3 Configuration
Table 13.2.1.1 List of UART3 Pins
I/O*
Initial status*
I
I (Hi-Z)
O
O (High)
* Indicates the status when the pin is configured for the UART3.
Seiko Epson Corporation
S1C31D50
3 channels (Ch.0 to Ch.2)
BRDIV
BRT[7:0]
FMD[3:0]
CHLN
PREN
PRMD
STPB
RBSY
TBSY
SFTRST
PUEN
RZI demodulator
INVRX
IRMD
RZI modulator
INVTX
Carrier modulator
PECAR
CAREN
CRPER[7:0]
OUTMD
TENDIF
FEIF
PEIF
OEIF
RB2FIF
RB1FIF
TBEIF
TBEDMAENx
RB1FDMAENx
Function
UART3 Ch.n data input pin
UART3 Ch.n data output pin
USINn
USOUTn
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
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