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SPIA Ch.n Control Register
Register name
Bit
SPIA_nCTL
15–8
7–2
1
0
Bits 15–2
Reserved
Bit 1
SFTRST
This bit issues software reset to SPIA.
1 (W): Issue software reset
0 (W): Ineffective
1 (R): Software reset is executing.
0 (R): Software reset has finished. (During normal operation)
Setting this bit resets the SPIA shift register and transfer bit counter. This bit is
automatically cleared after the reset processing has finished.
Bit 0
MODEN
This bit enables the SPIA operations.
1 (R/W): Enable SPIA operations (In master mode, the operating clock is supplied.)
0 (R/W): Disable SPIA operations (In master mode, the operating clock is stopped.)
Note:
If the SPIA_nCTL.MODEN bit is altered from 1 to 0 while sending/receiving data, the data being
sent/received cannot be guaranteed. When setting the SPIA_nCTL.MODEN bit to 1 again after that,
be sure to write 1 to the SPIA_nCTL.SFTRST bit as well.
SPIA Ch.n Transmit Data Register
Register name
Bit
SPIA_nTXD
15–0
Bits 15–0
TXD[15:0]
Data can be written to the transmit data buffer through these bits. In master mode, writing
to these bits starts data transfer.
Transmit data can be written when the SPIA_nINTF.TBEIF bit = 1 regardless of whether data
is being output from the SDOn pin or not.
Note that the upper data bits that exceed the data bit length configured by the
SPIA_nMOD. CHLN[3:0] bits will not be output from the SDOn pin.
Note:
Be sure to avoid writing to the SPIA_nTXD register when the SPIA_nINTF.TBEIF bit = 0. Other- wise,
transfer data cannot be guaranteed.
SPIA Ch.n Receive Data Register
Register name
Bit
SPIA_nRXD
15–0
Bits 15–0
RXD[15:0]
The receive data buffer can be read through these bits. Received data can be read when
the SPIA_ nINTF.RBFIF bit = 1 regardless of whether data is being input from the SDIn pin
or not. Note that the upper bits that exceed the data bit length configured by the
SPIA_nMOD.CHLN[3:0] bits become 0.
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
Bit name
Initial
–
0x00
–
0x00
SFTRST
0
MODEN
0
Bit name
Initial
TXD[15:0]
0x0000
Bit name
Initial
RXD[15:0]
0x0000
Seiko Epson Corporation
Reset
R/W
–
R
–
R
H0
R/W
H0
R/W
Reset
R/W
H0
R/W
Reset
R/W
H0
R
Remarks
–
Remarks
–
Remarks
–
14-17
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