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14.3. Clock Settings
14.3.1. SPIA Operating Clock
Operating clock in master mode
In master mode, the SPIA operating clock is supplied from the 16-bit timer. The following two
options are pro- vided for the clock configuration.
Use the 16-bit timer operating clock without dividing
By setting the SPIA_nMOD.NOCLKDIV bit to 1, the operating clock CLK_T16_m, which is configured
by selecting a clock source and a division ratio, for the 16-bit timer channel corresponding to the
SPIA channel is input to SPIA as CLK_SPIAn. Since this clock is also used as the SPI clock SPICLKn
without changing, the CLK_SPIAn frequency becomes the baud rate.
To supply CLK_SPIAn to SPIA, the 16-bit timer clock source must be enabled in the clock
generator. It does not matter how the T16_mCTL.MODEN and T16_mCTL.PRUN bits of the
corresponding 16-bit timer channel are set (1 or 0).
When setting this mode, the timer function of the corresponding 16-bit timer channel may be used
for an- other purpose.
Use the 16-bit timer as a baud rate generator
By setting the SPIA_nMOD.NOCLKDIV bit to 0, SPIA inputs the underflow signal generated by the
corresponding 16-bit timer channel and converts it to the SPICLKn. The 16-bit timer must be run with
an appropriate reload data set. The SPICLKn frequency (baud rate) and the 16-bit timer reload data
are calculated by the equations shown below.
��������_��������
�������������� =
2 × (������ + 1)
Where
fSPICLK:
fCLK_SPIA:
RLD:
For controlling the 16-bit timer, refer to the "16-bit Timers" chapter.
Operating clock in slave mode
SPIA set in slave mode operates with the clock supplied from the external SPI master to the SPICLKn
pin. The 16-bit timer channel (including the clock source selector and the divider) corresponding to
the SPIA channel is not used. Furthermore, the SPIA_nMOD.NOCLKDIV bit setting becomes
ineffective.
SPIA keeps operating using the clock supplied from the external SPI master even if all the internal
clocks halt during SLEEP mode, so SPIA can receive data and can generate receive buffer full
interrupts.
14-4
������ =
SPICLKn frequency [Hz] (= baud rate [bps])
SPIA operating clock frequency [Hz]
16-bit timer reload data value
Seiko Epson Corporation
��������_��������
− 1
fSPICLK × 2
(����. 14.1)
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
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