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Watchdog Timer 2
(2)
Access
Address
Initial Value
Caution
14.4 Watchdog Timer Operation
WDTE - Watchdog Timer enable register
The counter of Watchdog Timer 2 is cleared and counting restarted by writing
AC
to the WDTE register.
H
The register can be read/written in 8-bit units.
FFFF F6D1
H
9A
. The register is initialized by any reset.
H
7
6
R/W
R/W
1.
When a value other than AC
signal is forcibly output.
2.
When a 1-bit memory manipulation instruction is executed for the WDTE
register, an overflow signal is forcibly output.
3.
The read value of the WDTE register is 9A
AC
).
H
Watchdog Timer 2 automatically starts in the reset mode after reset is
released.
The WDTM2 register can be written only once following reset using byte
access. To use watchdog timer 2, write the operation mode and the interval
time to the WDTM2 register using an 8-bit memory manipulation instruction.
After this, the operation of watchdog timer 2 cannot be stopped/changed
again.
The WDCS24 to WDCS20 bits of the WDTM2 register are used to select the
watchdog timer 2 loop detection time interval.
Writing AC
to the WDTE register clears the counter of watchdog timer 2 and
H
starts the count operation again.
After the count operation has started, write AC
detection time interval.
If the time interval expires without AC
reset signal (WDT2RES) or a non-maskable interrupt request signal
(INTWDT2) is generated, depending on the set values of the WDM21 and
WDM20 bits of the WDTM2 register.
When not using watchdog timer 2, write 1FH to the WDTM2 register.
If the non-maskable interrupt request mode is set, execution cannot return
from non-maskable interrupt servicing by using the RETI instruction.
Therefore, execute system reset after completion of interrupt servicing.
User's Manual U18743EE1V2UM00
5
4
3
R/W
R/W
R/W
is written to the WDTE register, an overflow
H
being written to the WDTE register, a
H
2
1
R/W
R/W
(which differs from written value
H
to WDTE within the loop
H
Chapter 14
0
R/W
389
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