Description - NEC V850ES/F 3-L Series User Manual

Chapter 4

4.1.1 Description

OB_7A.STOPXTAL
OB_7A.STOPRCZ
PCC.FRC
XT1
Xtal
SubOSC
XT2
1/2
RC
240 KHz
f
RL
internal
oscillator
RCM.RSTOP
PCC.MFRC
OB_7B.PLLI[1:0]
f
X1
X
Divider
MainOSC
selector
X2
MainOSC
PCC.MCK
stop control
STOP mode
MCM.MCM0
8 MHz
internal
RCM.HRSTOP
oscillator
stop control
8 MHz
internal f
RH
PCLM.PCK[1:0]
oscillator
f
PCL
PCL
Note: OB_7A.bitname and OB7B.bitname describe control bits of option byte 007A
Figure 4-1
MainOSC
SubOSC
240 KHz internal
oscillator
160
The Clock Generator is built up as illustrated in the following figure.
f
0
XT
1
0 f
SC
1
OB_7B.SUBCLK
OB_7B.PLLO
PLLCTL.PLLON
f
f
PLLI PLLO
f
PLL(×8)
0
PLL
1
1/2 1
IDLE2 mode
1
0
0
PLLCTL.SELPLL
Divider
selector
Block diagram of the Clock Generator
The left-hand side of the figure shows how the four oscillators can be
connected to the CPU and peripheral modules. Software-controlled selectors
allow you to specify the signal paths.
The main oscillator (MainOSC) oscillates at frequencies f
After reset release, the main oscillator is stopped.Starting the oscillation must
be set via software.
The main oscillator is equipped with a stop control.
Oscillation of the main clock oscillator is stopped in the STOP mode or
controlled by the PCC register.
The sub oscillator (SubOSC) oscillates at a frequency f
(crystal connected) or typically 20 KHz with an external RC circuit.
The low speed internal oscillator generates a clock f
240 KHz typically. The oscillation can be stopped by means of the RCM
register. The oscillation cannot be stopped, if this is disabled by option byte
007A .
H
User's Manual U18743EE1V2UM00
IDLE
control
Clock
Monitor
IDLE1,2 mode
f
IDLE xx
PCC.CK[2:0]
Prescaler2
control
f /32
XX
f /16
XX
f /8
XX
f /4
XX
f /2
XX
f
XX
f
0
XP1
Prescaler1
1/2
1
IDLE2 mode
OB_7B.PRSI
IDLE
f
0
XP2
control
1/2
1
1/8
IDLE
control
PRSM0, PRSCM0 registers
IDLE1,2 mode
Prescaler3
1/128
and 007B
H H
Clock Generator
f
XT
f /8
RL
1/8
f
f f
RL
SC SC f
VBCLK
1
HALT f
0 CPU
control
PCC.CK3
HALT mode
f to f /1024
XP1 XP1
SELCNTx.ISELxx
f
XP1
0
f
XP2
1
f /512
XP1
0
f /8
RH
1
SELCNT0.ISEL07
f
XP1
0
f
XC
1
SELCNTx.ISELxx
f
BRG
f /128
X
= 4 MHz to 16 MHz.
X
of 32.768 KHz
XT
with a frequency of
RL
WT, TMM0,
TAA1, TAA3
WDT2, TMM0
CLKOUT
CPU system clock
CPU core clock
Peripheral clocks
UARTDn, TAAn,
MLM
TMM0
CANn
WT, CSIB0
WDT2