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Chapter 16
Discontinued
transmission
CBnTX
SCKBn
SOBn
INTCBnT
CBnTSF
(1)
Figure 16-4
444
In case the CSIB is operating in continuous slave transmission mode
(CBnCTL0.CBnTMS = 1, CBnCTL1.CBnCKS[2:0] = 111
written to the CBnTX register the SOBn pin outputs the level of the last bit.
Figure 16-4 outlines this behaviour.
55H
0
1
0
1
0
1
0
1
1
(2)
(3)
(4)
Discontinued slave transmission
The example shows the situation that two data bytes (55
transmitted correctly, but the third (96
(1) Data 55
is written (by the CPU) to CBnTX.
H
(2) The master issues the clock SCKBn and transmission of 55
(3) INTCBnT is generated and the next data AA
promptly, i.e. before the first data has been transmitted completely.
(4) Transmission of the second data AA
generated. But this time the next data is not written to CBnTX in time.
(5) Since there is no new data available in CBnTX, but the master continuous
to apply SCKBn clocks, SOBn remains at the level of the transmitted last
bit.
(6) New data (96
) is written to CBnTX.
H
(7) With the next SCKBn cycle transmission of the new data (96
As a consequence the master receives a corrupted data byte from (5)
onwards, which is made up of a random number of the repeated last bit of the
former data and some first bits of the new data.
User's Manual U18743EE1V2UM00
Clocked Serial Interface (CSIB)
AAH
0
1
0
1
0
1
0
(5)
) fails.
H
continues correctly and INTCBnT is
H
) and new data is not
B
96H
1
0
0
1
0
1
1
0
(6)
(7)
, AA
) are
H
H
starts.
H
is written to CBnTX
H
) starts.
H
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