NEC V850ES/F 3-L Series User Manual page 174

32-bit single-chip microcontroller
Table of Contents

Advertisement

Chapter 4
Table 4-8
Bit position
Bit name
3 to 0
CK[3:0]
a)
Preset in option byte 007B
main to subclock
174
PCC register contents (2/2)
Clock selection:
CK3
CK2
0
0
0
0
0
0
0
0
0
1
0
1
0
1
1
x
Note: 1. Do not change the CPU clock (by using the CK[3:0] bits) while CLKOUT is
being output.
2. Use a bit manipulation instruction to manipulate the CK3 bit. When using
an 8-bit manipulation instruction, do not change the set values of the
CK[2:0] bits.
.
H
Examples:
1. Confirmation of operating clock: Confirm that the current clock is in main
clock (MCS = 1). Switching from the high speed internal oscillator clock
operation to low-speed internal oscillator clock operation is prohibited. In
the high-speed internal oscillation clock operation (MCS = 0), set the
MCM.MCM0 bit = 1 and then confirm that the MCM.MCM0 bit = 1 again.
2. Confirmation of CPU clock (fCPU) frequency:
Confirm that fCPU satisfies either of the following conditions.
• When OB7B.SUBLCK = 0, fCPU > subclock oscillation frequency (fXT)
(32.768 kHz) × 4
• When OB7B.SUBCLK = 1, fCPU > low-speed internal oscillation clock
frequency (fRL) (TYP.240 kHz) × 4
If the above conditions are not satisfied, change the CK2 to CK0 bits set-
ting so as to satisfy the condition. At this time, do not change the CK3 bit.
3. Setting the CK3 bit to "1": Set via bit manipulation instruction. Do not
change the CK2-CK0 bits.
4. Subclock operation: The maximum time required for switching to subclock
operation or to low-speed internal oscillation clock operation after the CK3
bit is set to 1, is as follows:
• When OB7B.SUBCLK = 0: 1 / Subclock oscillation frequency (fXT)
• When OB7B.SUBCLK = 1: 1 / low-speed internal oscillation frequency
(fRL)
Read the CLS bit and confirm that the operation has been switched to the
subclock or low-speed internal oscillation operation.
5. Setting the MCK bit to "1": Set the MCK bit = 1 to stop the main oscillator
operation.
Caution: Stop PLL/SSCG before stopping the main oscillator operation. In
addition, stop the operation of internal peripheral functions which operate
at the main clock frequency.
User's Manual U18743EE1V2UM00
Function
CK1
CK0
0
0
0
1
1
0
1
1
0
0
0
1
1
x
x
x
Clock Generator
Clock selection
f
XX
f
/2
XX
f
/4
XX
f
/8
XX
f
/16
XX
f
/32
XX
Setting prohibited
a
Subclock f
(f
or f
)
SC
XT
RL

Advertisement

Table of Contents
loading

Table of Contents