NEC V850ES/F 3-L Series User Manual page 351

16-Bit Timer/Event Counter AA
TAAnCCS[1:0] = 00
Timer operation enable
(TAAnCE = 1)
→
Transfer of TAAnCCR0
and TAAnCCR1 values
to CCR0 and CCR1
buffer registers
Match between CCR1
buffer and 16-bit
counter
Match between CCR0
buffer and 16-bit
counter
16-bit counter overflow
Figure 10-23
• Clock selection
(TAAnCTL0: TAAnCKS[2:0])
Free-running mode setting
•
(TAAnCTL1: TAAnMD[2:0] = 101B)
TAAnCCS[1:0] setting
TAAnCCS[1:0] = 01
TIAAn0 edge detection
setting (TAAnIS1, TAAnIS0)
Timer operation enable
(TAAnCE = 1)
→
Transfer of TAAnCCR1
value to CCR1 buffer
register
Match between CCR1
buffer and 16-bit
counter
TIAAn0 edge detection,
capture of 16-bit counter
value to TAAnCCR0.
16-bit counter overflow
Flowchart of Basic Operation in Free-Running Mode
User's Manual U18743EE1V2UM00
START
Initial settings
TAAnCCS[1:0] = 10
TIAAn1 edge detection
setting (TAAnIS3, TAAnIS2)
Timer operation enable
(TAAnCE = 1)
→
Transfer of TAAnCCR0
value to CCR0 buffer
register
TIAAn1 edge detection,
capture of 16-bit counter
value to TAAnCCR1.
Match between CCR0
buffer and 16-bit
counter
16-bit counter overflow
Chapter 10
TAAnCCS[1:0] = 11
TIAAn0, TIAAn1 edge det.
setting (TAAnIS[3:0])
Timer operation enable
(TAAnCE = 1)
TIAAn1 edge detection,
capture of 16-bit counter
value to TAAnCCR1.
TIAAn0 edge detection,
capture of 16-bit counter
value to TAAnCCR0.
16-bit counter overflow
351