Interval Timer Mode (Taanmd2 To Taanmd0 = 000 B ) - NEC V850ES/F 3-L Series User Manual

32-bit single-chip microcontroller
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16-Bit Timer/Event Counter AA
10.6.2 Interval timer mode (TAAnMD2 to TAAnMD0 = 000
Figure 10-8
In the interval timer mode, an interrupt request signal (INTTAAnCC0) is
generated upon a match between the setting value of the TAAnCCR0 register
and the value of the 16-bit counter, and the 16-bit counter is cleared. The
TAAnCCR0 register can be rewritten when TAAnCE = 1, and when a value is
set to TAAnCCR0 with a write instruction from the CPU, it is transferred to the
CCR0 buffer register through any time write mode, and is compared with the
16-bit counter value.
In the interval timer mode, the 16-bit counter is cleared only upon a match
between the value of the 16-bit counter and the value of the CCR0 buffer
register.
16-bit counter clearing using the TAAnCCR1 register is not performed.
However, the setting value of the TAAnCCR1 register is transferred to the
CCR1 buffer register and compared with the value of the 16-bit counter, and an
interrupt request (INTTAAnCC1) is output if these values match. In addition,
TOAA1n pin output is also possible by setting the TAAnOE1 bit to 1.
When the TAAnCCR1 register is not used, it is recommended to set FFFFH as
the setting value for the TAAnCCR1 register.
When performing timer output with the TOAAn1 pin, set the same values to the
TAAnCCR0 register and the TAAnCCR1 register since the 16-bit timer counter
cannot be cleared with the TAAnCCR1 register.
• Clock selection
(TAAnCTL0: TAAnCKS[2:0])
• Interval mode setting
(TAAnCTL1: TAAnMD[2:0] = 000B)
• Compare register setting
(TAAnOPT0: TAAnCCS[1:0]= 00)
Timer operation enable (TAAnCE = 1)
→ Transfer of TAAnCCR0, TAAnCCR1
values to CCR0 buffer register
and CCR1 buffer register
Match between 16-bit counter and
CCR1 buffer register
Match between 16-bit counter and
CCR0 buffer register,
16-bit counter clear & start
Flowchart of basic operation in interval timer mode
User's Manual U18743EE1V2UM00
STAR T
Initial settings
Note
Chapter 10
)
B
INTTAAnCC1 output
INTTAAnCC0 output
331

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