NEC V850ES/F 3-L Series User Manual page 550

Chapter 18
Figure 18-19
Table 18-16
Segment name
Sync segment
(Synchronization segment)
Prop segment
Phase segment 1
Phase segment 2
SJW
Note
550
Sync segment
Configuration of data bit time defined by CAN specification
Configuration of data bit time defined by CAN specification
Settable range
1
Programmable to 1 to 8
or more
Programmable to 1 to 8
Phase segment 1 or IPT,
whichever greater
Programmable from 1TQ to
length of segment 1 or 4TQ,
whichever is smaller
IPT: Information Processing Time
User's Manual U18743EE1V2UM00
Data bit time(DBT)
Prop segment Phase segment 1
Notes on setting to conform to CAN
specification
This segment starts at the edge where the level
changes from recessive to dominant when
hardware synchronization is established.
This segment absorbs the delay of the output
buffer, CAN bus, and input buffer.
The length of this segment is set so that ACK is
returned before the start of phase segment 1.
Time of prop segment ≥ (Delay of output buffer) +
2 × (Delay of CAN bus) + (Delay of input buffer)
This segment compensates for an error of data bit
time.
The longer this segment, the wider the permissible
range but the slower the communication speed.
This width sets the upper limit of expansion or
contraction of the phase segment during
resynchronization.
CAN Controller (CAN)
Phase segment 2
SJW
Sample point (SPT)