NEC V850ES/F 3-L Series User Manual page 354

32-bit single-chip microcontroller

Table of Contents

mactch interrupt

Figure 10-26

When TAAnCCS1 = 1 and TAAnCCS0 = 0

When TAAnCE = 1 is set, the counter counts from 0000H to FFFFH and free-

running count-up operation continues until TAAnCE = 0 is set. The TAAnCCR0

match between the value of the 16-bit counter and the setting value transferred

to the CCR0 buffer register from the TAAnCCR0 register as an interval

function. Even if TAAnOE1 = 1 to realize the output function, TAAnCCR1

Basic Operation Timing in Free-Running Mode

(TAAnCCS1 = 1, TAAnCCS0 = 0)

(TAAnOE0 = 1, TAAnOE1 = 1, TAAnOL0 = 0, TAAnOL1 = 0)

Setting compare values of TAAnCCR0 register (0000H to FFFFH)

D10, D11, D12, D13, D14, D15:

Values captured to TAAnCCR1 register (0000H to FFFFH)

Set to detection of both rising and falling edges (TAAnIS3, TAAnIS2 = 11)

User's Manual U18743EE1V2UM00

16-Bit Timer/Event Counter AA