Operation; Reset Generation From Lvi (Lvim.lvimd = 1) - NEC V850ES/F 3-L Series User Manual

Low-Voltage Detector

22.4 Operation

22.4.1 Reset generation from LVI (LVIM.LVIMD = 1)

Operation start
Caution
Depending on the setting of the LVIMD bit, the interrupt signals (INTLVIL,
INTLVIH) or an internal reset signal is generated.
How to specify each operation is described below, together with timing charts.
1. Mask the interrupt of LVI.
2. Select the voltage to be detected by using the LVIS.LVIS0 bit.
3. Set the LVIM.LVION bit to 1 (to enable operation).
4. Insert sufficient wait time by software. See the Electrical Target Specifica-
tion for details.
5. By using the LVIM.LVIF bit, check if the
supply voltage V
DD
6. Set the LVIM.LVIMD bit to 1 (to generate an internal reset signal).
If LVIM.LVIMD is set to 1, the contents of the LVIM and LVIS registers cannot
be changed until a reset request other than LVI is generated.
User's Manual U18743EE1V2UM00
> reference voltage V
LVI
Chapter 22
.
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