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CPU System Functions
(6)
Initial Value
31
30
29
28
0
0
0
a
a
a
R
R
R
R
a)
These bits may be written, but write is ignored.
If an interrupt (maskable or non-maskable) is acknowledged during instruction
execution, generally, the address of the instruction following the one being
executed is saved to the saving registers, except when an interrupt is
acknowledged during execution of one of the following instructions:
• load instructions (SLD.B, SLD.BU, SLD.H, SLD.HU, SLD.W)
• divide instructions (DIV, DIVH, DIVU, DIVHU)
• PREPARE, DISPOSE instruction (only if an interrupt is generated before the
stack pointer is updated)
In this case, the address of the interrupted instruction is restored to the EIPC
or FEPC, respectively. Execution is stopped, and after the completion of
interrupt servicing the execution is resumed.
CTBP - CALLT base pointer
The 32-bit CALLT base pointer is used with the CALLT instruction. The register
content is used as a base address to generate both a 32-bit table entry
address and a 32-bit target address.
Undefined
27
26
25
0
0
0
a
a
a
R
R
User's Manual U18743EE1V2UM00
base address
R/W
Chapter 3
1
0
0
R
145
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