NEC V850ES/F 3-L Series User Manual page 180

Chapter 4
(3)
Access
Address
Initial Value
Table 4-13
Bit position Bit name
2 to 0 PLLS[2:0] PLL lockup time selection:
Note
Caution
180
PLLS - PLL lockup time specification register
The 8-bit PLLS register specifies the settling time of the PLL.
This register can be read/written in 8-bit units.
FFFF F6C1 .
H
03 . The register is initialized by any reset.
H
7 6 5
0 0 0
R R R
PLLS register contents
PLLS2 PLLS1
0 1
0 1
1 0
For the exact lockup time, refer to the Electrical Target Specification.
Do not change the setting of the PPLS register during the PLL lock-up time.
User's Manual U18743EE1V2UM00
4 3 2
0 0 PLLS2
R R R/W
Function
PLLS0
0
1 2
0
Clock Generator
1 0
PLLS1 PLLS0
R/W R/W
Lockup time
12
2 /f
X
13
/f (default value)
X
14
2 /f
X