NEC V850ES/F 3-L Series User Manual page 199

32-bit single-chip microcontroller
Table of Contents

Advertisement

Clock Generator
(2)
Entering IDLE1
mode
IDLE1 mode status
Table 4-27
MainOSC (f
)
X
SubOSC (f
)
XT
240 KHz internal oscillator (f
8 MHz internal oscillator (f
PLL (f
)
PLLO
CPU
Port function
Timer/counter
TAA0 -TAA4 Operable, if f
TMM0
Watch Timer (WT)
Watchdog Timer (WDT2)
b
AD converter
Serial Interface
UARTD0-2
CSIB0-1
IIC00
CAN Controller (CAN0)
Interrupt Controller
Key interrupting function
Clock Monitor
IDLE1 mode
In the IDLE1 mode, the main oscillator, PLL and flash memory continue
operating, but clock supply to the CPU and the other on-chip peripheral
functions is stopped.
As a result, program execution is stopped, and the contents of the internal
RAM before the IDLE1 mode was set are retained. The CPU and other on-chip
peripheral functions stop operating. However, the on-chip peripheral functions
that can operate on the subclock or external clock continue operating.
The IDLE1 mode can reduce current consumption more than the HALT mode
because the operations of the on-chip peripheral functions are stopped.
Because the main oscillator is not stopped, however, the normal mode can be
restored without securing the oscillation stabilization time, in the same manner
as in the HALT mode.
The IDLE1 mode is set when the PSM1 and PSM0 bits of the PSMR register
are cleared to "00" and the STP bit of the PSC register is set to 1 in the normal
operation mode.
Insert five or more NOP instructions after the store instruction that manipulates
the PSC register to set the IDLE1 mode.
The following table shows the operation status in the IDLE1 mode.
Controller status in IDLE1 mode (1/2)
Without Subclock
Oscillation enabled
-
) Oscillation enabled
RL
)
Oscillation enabled
RH
Operable
Stops operation
Holds status before IDLE1 mode is set
is selected as the count
XP2
clock
Operable, if f
/8 , f
RH
selected as the count clock
Operable, if clocked by Prescaler3
Operable
Stops operation
UARTD0: Operable if either f
UARTD1-2: Operable if f
Operable, if SCKBn is selected as input clock.
Stops operation
Stops operation
Stops operation (But it is possible to leave IDLE1 Mode)
Operable
Operable
User's Manual U18743EE1V2UM00
Working condition
Oscillation enabled
TAA0, 2, and 4: Operable, if f
selected as the count clock.
TAA1 and 3: Operable, if f
selected as the count clock
/8 ir INTWT is
Operable if f
RL
selected as count clock.
Operable
or ASCKD0 is selected input clock
XP2
is selected as operation clock.
XP2
Chapter 4
With Subclock
is
XP2
or f
is
XP2
XT
a
/8, f
/8, INTWT or f
RH
RL
XT
199
is

Advertisement

Table of Contents
loading

Table of Contents