Ram Retention Voltage Detection Operation - NEC V850ES/F 3-L Series User Manual

Chapter 22

22.4.4 RAM retention voltage detection operation

Caution
Figure 22-4
722
The supply voltage and the data retention voltage are compared. When the
supply voltage drops below the data retention voltage (including power on
application), the RAMS.RAMF bit is set.
For the specification of the data retention voltage, consult the Electrical Target
Specification.
The RAMS.RAMF flag behaves as follows:
• After power up the RAMS.RAMF is set.
• RAMS.RAMF can only be reset by software.
• RAMS.RAMF remains 0 as long as the supply voltage exceeds the data
retention voltage.
• The RAMS.RAMF flag is not influenced by any reset.
• If the supply voltage drops below the power-on-clear reference voltage, but
stays above the data retention voltage, a POC reset is applied, but
RAMS.RAMF remains 0.
If an external RESET is applied during a RAM access of the CPU, parts of the
RAM content may have changed accidentally. Such event does not set
RAMS.RAMF.
V
DD
POC
detection voltage
RAM data
detection voltage
POCRES
RAMS.RAMF
power up
Power-on-clear and RAM data retention detection behaviour
User's Manual U18743EE1V2UM00
clear by software
Low-Voltage Detector
time
RAMF remains "1"