External Interrupts Edge Detection Configuration - NEC V850ES/F 3-L Series User Manual

Chapter 5

5.4 External Interrupts Edge Detection Configuration

INTRm
Bit position
15 to 0
INTFm
Bit position
15 to 0
Caution
(1)
7
INTR0 0
7
INTF0 0
244
The microcontroller provides the maskable external interrupts INTPn and one
non-maskable interrupt (NMI).
INTPn and NMI can be configured to generate interrupts upon rising, falling or
both edges. Two register sets are provided to specify edges and levels for each
external interrupt.
The INTRm registers specify the rising edge for edge detection of
corresponding external interrupt signals.
This register can be read/written in 8-bit and 1-bit units.
16-bit registers can also be read/written in 16-bit units.
Bit name
Specifies the edge detection for external interrupt
signals
INTRm[15:0]
0: no detection at rising edge
1: detection at rising edge
The INTFm registers specify the falling edge for edge detection of
corresponding external interrupt signals.
This register can be read/written in 8-bit and 1-bit units.
16-bit registers can also be read/written in 16-bit units.
Bit name
Specifies the edge detection for external interrupt
signals
INTFm[15:0]
0: no detection at falling edge
1: detection at falling edge
When the function of the dedicated pin is changed from the external interrupt
function (alternate function) to the port function, an edge may be detected.
Therefore, first clear INTRm.INTRmk / INTFm.INTFmk (k = 0 to 15) to 0, and
then set the port mode.
INTR0/INTF0 - External interrupt edge specification register 0
6 5 4
INTR06 INTR05 INTR04
INTP3 INTP2 INTP1
6 5 4
INTF06 INTF05 INTF04
INTP3 INTP2 INTP1
User's Manual U18743EE1V2UM00
Function
Function
3 2 1
INTR03 INTR02 0
INTP0 NMI
3 2 1
INTF03 INTF02 0
INTP0 NMI
Interrupt Controller (INTC)
0 Address
0 FFFF FC20H 00H
0 Address
0 FFFF FC00H 00H
Initial
value
Initial
value