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Chapter 17
EXCn
0
Extension code was not received.
1
Extension code was received.
Condition for clearing (EXCn = 0)
• When a start condition is detected
• When a stop condition is detected
• Cleared by LRELn = 1 (communication save)
• When the IICEn bit changes from 1 to 0 (operation
stop)
• After reset
COIn
0
Addresses do not match.
1
Addresses match.
Condition for clearing (COIn = 0)
• When a start condition is detected
• When a stop condition is detected
• Cleared by LRELn bit = 1 (communication save)
• When the IICEn bit changes from 1 to 0 (operation
stop)
• After reset
TRCn
0
Receive status (other than transmit status). The SDA0n line is set to high impedance.
Transmit status. The value in the SO latch is enabled for output to the SDA0n line (valid starting at
1
the falling edge of the first byte's ninth clock).
Condition for clearing (TRCn = 0)
• When a stop condition is detected
• Cleared by LRELn = 1 (communication save)
• When the IICEn bit changes from 1 to 0 (operation
stop)
• Cleared by WRELn = 1
• When the ALDn bit changes from 0 to 1 (arbitration
loss)
• After reset
Master
• When "1" is output to the first byte's LSB (transfer
direction specification bit)
Slave
• When a start condition is detected
When not used for communication
ACKDn
0
ACK was not detected.
468
Detection of extension code reception
Matching address detection
Transmit/receive status detection
Note
User's Manual U18743EE1V2UM00
Condition for setting (EXCn = 1)
•
When the higher four bits of the received address
data are either "0000" or "1111" (set at the rising
edge of the eighth clock).
Condition for setting (COIn = 1)
•
When the received address matches the local
address (SVAn register) (set at the rising edge of
the eighth clock).
Condition for setting (TRCn = 1)
Master
• When a start condition is generated
Slave
• When "1" is input by the first byte's LSB (transfer
direction specification bit)
ACK detection
2
I
C Bus (IIC)
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