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Chapter 3
156
Since any action between writing to a write enable register and writing to a
protected register destroys this sequence, the effects of interrupts have to be
considered:
• Interrupts:
In order to prevent any maskable interrupt to be acknowledged between the
two write instructions in question, shield this sequence by DI-EI (disable
interrupt—enable interrupt).
However, any non-maskable interrupt can still be acknowledged.
User's Manual U18743EE1V2UM00
CPU System Functions
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