NEC V850ES/F 3-L Series User Manual page 700

Chapter 19
(7)
Figure 19-19
(8)
(9)
Figure 19-20
700
Integral linearity error
This error indicates the extent to which the conversion characteristics differ
from the ideal linear relationship. It indicates the maximum value of the
difference between the actually measured value and its theoretical value where
the zero-scale error and full-scale error are 0.
1 ...... 1
0 ...... 0
Integral linearity error
Conversion time
This is the time required to obtain a digital output after an analog input voltage
has been assigned.
The conversion time in the characteristics table includes the sampling time.
Sampling time
This is the time for which the analog switch is ON to load an analog voltage to
the sample & hold circuit.
Sampling time
Sampling time
User's Manual U18743EE1V2UM00
Ideal line
0
Analog input
Conversion time
A/D Converter (ADC)
Integral
linearity error
AV
REF