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2
I
C Bus (IIC)
(8)
After reset: 00
H
IICn
(9)
After reset: 00
H
SVAn
IICn - IICn shift registers
The IICn registers are used for serial transmission/reception (shift operations)
synchronized with the serial clock. These registers can be read or written in 8-
bit units, but data should not be written to the IICn register during a data
transfer.
Access (read/write) this register only during the wait period. Accessing this
register in communication states other than the wait period is prohibited.
However, for the master device, this register can be written once only after the
transmission trigger bit (IICC0.STT0 bit) has been set to 1.
A wait state is released by writing the IICn register during the wait period, and
data transfer is started.
Reset input clears these registers to 00
R/W
Address:
7
6
SVAn - IICn slave address registers
The SVAn registers hold the I
These registers can be read or written in 8-bit units, but bit 0 should be fixed
to 0.
Rewriting these registers is prohibited when the IICS0.STD0 bit = 1
Reset input sets this register to 00H.
R/W
Address:
7
6
User's Manual U18743EE1V2UM00
.
H
IC0 FFFFFD80
H
5
4
3
2
C bus's slave addresses.
SVA0 FFFFFD83
H
5
4
3
Chapter 17
2
1
0
2
1
0
0
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