NEC V850ES/F 3-L Series User Manual page 353

32-bit single-chip microcontroller
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16-Bit Timer/Event Counter AA
(2)
TAAnCE = 1
FFFFH
16-bit
counter
TIAAn0
TAAnCCR0
TIAAn1
TAAnCCR1
INTTAAnCC0
capture interrupt
INTTAAnCC1
capture interrupt
INTTAAnOV
TOAAn0
L
TOAAn1
L
Figure 10-25
When TAAnCCS1 = 1 and TAAnCCS0 = 1 settings (capture function
description)
When TAAnCE = 1, the 16-bit counter counts from 0000H to FFFFH and free-
running count-up operation continues until TAAnCE = 0 is set. During this time,
values are captured by capture trigger operation and are written to the
TAAnCCR0 and TAAnCCR1 registers.
Regarding capture close to the overflow (FFFFH), judgment is made using the
overflow flag (TAAnOVF). However, if overflow occurs twice (two or more free-
running cycles), the capture trigger interval cannot be judged with the
TAAnOVF flag. In this case, the system should be revised.
D
10
D
00
0000H
D
00
0000H
Basic Operation Timing in Free-Running Mode
(TAAnCCS1 = 1, TAAnCCS0 = 1)
(TAAnOE0 = 1, TAAnOE1 = 1, TAAnOL0 = 0, TAAnOL1 = 0)
D00, D01, D02, D03:
Values captured to TAAnCCR0 register (0000H to FFFFH)
D10, D11, D12:
Values captured to TAAnCCR1 register (0000H to FFFFH)
TIAAn0: Set to rising edge detection (TAAnIS1, TAAnIS0 = 01)
TIAAn1: Set to falling edge detection (TAAnIS3, TAAnIS2 = 10)
User's Manual U18743EE1V2UM00
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Chapter 10
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353

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