NEC V850ES/F 3-L Series User Manual page 219

Clock Generator
Normal
CPU
operation
operation
Main clock
Internal oscillator
clock
CLME
Clock monitor
status
During
monitor
Figure 4-12
(5)
CPU
operation
Main clock
Internal oscillator
clock
CLME
Clock monitor
status
During
monitor
Figure 4-13
Software STOP Oscillation stabilization time
Oscillation stabilization time
Oscillation stops
Monitor stops
Operation in STOP mode or after STOP mode is released
Operation when main clock is stopped
During subclock operation (CLS bit of the PCC register = 1) or when the main
clock is stopped by setting the MCK bit of the PCC register to 1, the monitor
operation is stopped until the main clock operation is started (CLS bit of PCC
register = 0). The monitor operation is automatically started when the main
clock operation is started.
Subclock operation
PCCMCK bit = 1 Oscillation stabilization
time count by software
Oscillation stabilization time
Oscillation stops
(set by OSTS register)
Monitor stops
Operation When Main Clock Is Stopped (Arbitrary)
User's Manual U18743EE1V2UM00
(set by OSTS register)
Monitor stops
Chapter 4
Normal operation
During monitor
Main clock operation
During monitor
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