Register Bit Configuration - NEC V850ES/F 3-L Series User Manual

CAN Controller (CAN)

18.5.4 Register bit configuration

Table 18-21
Address
Symbol
a
offset
00 CnGMCTRL (W)
H
01
H
00 CnGMCTRL (R)
H
01
H
02 CnGMCS
H
06 CnGMABT (W)
H
07
H
06 CnGMABT (R)
H
07
H
08 CnGMABTD
H
a)
Base address: <CnRBaseAddr>
Table 18-22
Address
Symbol
a
offset
40 CnMASK1L
H
41
H
42 CnMASK1H
H
43
H
44 CnMASK2L
H
45
H
46 CnMASK2H
H
47
H
48 CnMASK3L
H
49
H
4A CnMASK3H
H
4B
H
4C CnMASK4L
H
4D
H
4E CnMASK4H
H
4F
H
50 CnCTRL (W)
H
51
H
50 CnCTRL (R)
H
51
H
CAN global register bit configuration
Bit 7/15 Bit 6/14 Bit 5/13 Bit 4/12 Bit 3/11 Bit 2/10
0 0
0 0
0 0
MBON 0
0 0
0 0
0 0
0 0
0 0
0 0
CAN module register bit configuration (1/2)
Bit 7/15 Bit 6/14 Bit 5/13
0 0
0 0
0 0
0 0
0 Clear AL Clear
VALID
Set Set
CCERC AL
CCERC AL VALID
0 0
User's Manual U18743EE1V2UM00
0 0 0
0 0 0
0 0 0
0 0 0
0 0 CCP3
0 0 0
0 0 0
0 0 0
0 0 0
0 0 ABTD3
Bit 4/12 Bit 3/11
CMID7 to CMID0
CMID15 to CMID8
CMID23 to CMID16
0
CMID7 to CMID0
CMID15 to CMID8
CMID23 to CMID16
0
CMID7 to CMID0
CMID15 to CMID8
CMID23 to CMID16
0
CMID7 to CMID0
CMID15 to CMID8
CMID23 to CMID16
0
Clear Clear
PSMODE1 PSMODE0
0 Set Set
PSMODE1 PSMODE0
PS PS
MODE1 MODE0
0 0 0
Chapter 18
Bit 1/9
0 0
0 Set EFSD
0 EFSD
0 0
CCP2 CCP1
0 0
0 Set
ABTCLR
0 ABTCLR
0 0
ABTD2 ABTD1
Bit 2/10 Bit 1/9
CMID28 to CMID24
CMID28 to CMID24
CMID28 to CMID24
CMID28 to CMID24
Clear Clear
OPMODE2 OPMODE1
Set Set
OPMODE2 OPMODE1
OP OP
MODE2 MODE1
0 RSTAT
Bit 0/8
Clear GOM
Set GOM
GOM
0
CCP0
Clear
ABTTRG
Set
ABTTRG
ABTTRG
0
ABTD0
Bit 0/8
Clear
OPMODE0
Set
OPMODE0
OP
MODE0
TSTAT
557