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Chapter 15
Note
Note
398
UDnSTT
0
1
SBF transmition trigger
• This is the SBF transmittion trigger bit during LIN communication, and when read,
"0" is always read.
• Set the UDnSTT bit after setting the UDnPWR bit = UDnTXE bit = 1.
1.
To cancel the SBF reception enable status without receiving the SBF, set
the UDnPWR bit = 0 or UDnRXE bit = 0.
2.
The confirmation method of SBF receive completion while the UDnSRT bit
is set depends on the values of the SBF reception mode selection bit
(UDnSRS). If the UDnSRS bit is cleared to 0, it is confirmed by receive
completion interrupt which is detected after the setting of the SBF
reception trigger bit.
If the UDnSRS bit is set to 1, it is confirmed by whether the SBF receive
success flag (UDnSSF) is 1 when status interrupt is detected after the
setting of the SBF reception trigger bit. It can also be confirmed by the
UDnSRF bit = 0 after the receive interrupt or the status interrupt is
detected. In any case, after the SBF reception is completed, the UART
normal reception is operated at the next reception.
3.
Data transmission while UDnDCS bit = 1 during UDnSRF bit = 1 is
prohibited. However, the SBF transmission is enabled.
Before starting the SBF transmission by UDnOPT0.UDnSTT=1 make sure that
no data transfer is ongoing, that means check that UDnSTR.UDnTSF=0.
UDnSLS2
UDnSLS1
1
1
1
0
0
0
0
1
This register can be set when the UDnPWR bit = 0 or when the UDnTXE bit = 0.
UDnTDL
0
Normal output of transfer data
1
Inverted output of transfer data
• The output level of the TXDDn pin can be inverted using the UDnTDL bit.
• This register can be set when the UDnPWR bit = 0 or when the UDnTXE bit = 0.
UDnRDL
0
Normal input of transfer data
1
Inverted input of transfer data
• The output level of the RXDDn pin can be inverted using the UDnRDL bit.
• This register can be set when the UDnPWR bit = 0 or the UDnRXE bit = 0.
The UDnTDL bit control inverts the TXDDn output level regardless of the
values of the UDnPWR and UDnTXE bits. Therefore, if the UDnTDL bit is set
to 1 while the operation is disabled, the TXDDn outputs the low level.
User's Manual U18743EE1V2UM00
Asynchronous Serial Interface (UARTD)
SBF transmission trigger
Note
.
UDnSLS0
0
1
13-bit output (reset value)
1
0
14-bit output
1
1
15-bit output
0
0
16-bit output
0
1
17-bit output
1
0
18-bit output
1
1
19-bit output
0
0
20-bit output
Transmit data level bit
Receive data level bit
-
SBF transmit length selection
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