NEC V850ES/F 3-L Series User Manual page 656

32-bit single-chip microcontroller
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Chapter 18
Figure 18-54
Caution
656
START
No
BOFF = 1?
Yes
Clear all TRQ bits
Set CnCTRL register
(Clear OPMODE)
Access to registers other than
CnCTRL and CnGMCTRL
registers
Forced recovery from bus off?
Set CCERC bit
Set CnCTRL register
(Set OPMODE)
Note:
Clear all TRQ bits when re-initialization of message buffer is executed by clearing
RDY bit before bus-off recovery sequence is started.
OPMODE: Normal operation mode, normal operation mode with ABT,
receive-only mode, single-shot mode, self-test mode
Bus-off recovery (except normal operation mode with ABT)
When the transmission from the initialization mode to any operation modes is
requested to execute bus-off recovery sequence again in the bus-off recovery
sequence, reception error counter is cleared.
Therefore it is necessary to detect 11 consecutive recessive-level bits 128
times on the bus again.
User's Manual U18743EE1V2UM00
Note
No
Yes
END
CAN Controller (CAN)
Set CnCTRL register
(Set OPMODE)
Wait for recovery
from bus off

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