NEC V850ES/F 3-L Series User Manual page 469

2
I C Bus (IIC)
1 ACK was detected.
Condition for clearing (ACKDn = 0)
• When a stop condition is detected
• At the rising edge of the next byte's first clock
• Cleared by LRELn = 1 (communication save)
• When the IICEn bit changes from 1 to 0 (operation
stop)
• After reset
Note
STDn
0 Start condition was not detected.
1 Start condition was detected. This indicates that the address transfer period is in effect
Condition for clearing (STDn = 0)
• When a stop condition is detected
• At the rising edge of the next byte's first clock
following address transfer
• Cleared by LRELn = 1 (communication save)
• When the IICEn bit changes from 1 to 0 (operation
stop)
• After reset
SPDn
0 Stop condition was not detected.
Stop condition was detected. The master device's communication is terminated and the bus is
1
released.
Condition for clearing (SPDn = 0)
• At the rising edge of the address transfer byte's first
clock following setting of this bit and detection of a
start condition
• When the IICEn bit changes from 1 to 0 (operation
stop)
• After reset
The TRCn bit is cleared and SDA0n line becomes high impedance when the
WRELn bit is set and the wait state is canceled at the ninth clock by
TRCn = 1.
Start condition detection
Stop condition detection
User's Manual U18743EE1V2UM00
Condition for setting (ACKD = 1)
• After the SDA0n bit is set to low level at the rising
edge of the SCL0n pin's ninth clock
Condition for setting (STDn = 1)
• When a start condition is detected
Condition for setting (SPDn = 1)
• When a stop condition is detected
Chapter 17
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