NEC V850ES/F 3-L Series User Manual page 470

32-bit single-chip microcontroller
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Chapter 17
(3)
After reset: 00
H
IICFn
STCFn
0
Start condition issued
1
Start condition cannot be issued, STTn bit cleared
Condition for clearing (STCFn = 0)
• Cleared by IICCn.STTn = 1
• When IICC0.IICE0 bit = 0
• After reset
IICBSYn
0
Bus released status
1
Bus communication status
Condition for clearing (IICBSYn = 0)
• When stop condition is detected
• When IICC0.IICE0 bit = 0
• After reset
STCENn
Start conditions cannot be generated until a stop condition is detected following operation enable
0
(IICEn bit = 1).
Start conditions can be generated even if a stop condition is not detected following operation
1
enable (IICEn = 1).
Condition for clearing (STCENn = 0)
• When start condition is detected
• After reset
470
IICFn - IICn flag registers
The registers set the I
These registers can be read or written in 8-bit or 1-bit units. However, the
STCFn and IICBSYn bits are read-only.
IICRSVn enables/disables the communication reservation function.
The initial value of the IICBSYn bit is set by using the STCENn bit (see
"Cautions" on page 511).
The IICRSVn and STCENn bits can be written only when operation of I
disabled (IICCn.IICEn = 0). After operation is enabled, IICFn can be read.
RESET input sets this register to 00H.
Note
Address:
R/W
<7>
<6>
STCFn
IICBSYn
Initial start enable trigger
User's Manual U18743EE1V2UM00
2
Cn operation mode and indicate the I
IICF0 FFFFFD8A
H
5
4
3
0
0
0
STTn clear
Condition for setting (STCFn = 1)
When start condition is not issued and STTn flag
is cleared during communication reservation is
disabled (IICRSVn = 1).
2
I
Cn bus status
Condition for setting (IICBSYn = 1)
• When start condition is detected
• By setting the IICCn.IICEn bit when the STCENn =
0
Condition for setting (STCENn = 1)
• Setting by instruction
2
I
C Bus (IIC)
2
C bus status.
2
Cn is
2
<1>
<0>
0
STCENn IICRSVn

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