NEC V850ES/F 3-L Series User Manual page 152

32-bit single-chip microcontroller

Table of Contents

Internal RAM areas V850ES/Fx3-L

V850ES/FE3-L

V850ES/FF3-L

V850ES/FG3-L

Note that the internal firmware, which is processed after reset, uses some

RAM (refer to "Reset" on page 705).

Fixed peripheral I/O area

The 4 KB area between addresses 03FF F000

as the internal fixed peripheral I/O area. Accesses to these addresses are

passed over to the NPB bus (internal bus).

The following registers are memory-mapped to this area:

• All registers of peripheral functions

• Registers of timers

• Configuration registers of interrupt and Memory Controllers

• Configuration registers of the clock controller

For a list of all peripheral I/O registers, see "Special Function Registers" on

Because the physical address space covers 64 MB, the address bits

A[31:26] are not considered. Thus, this 4 KB address space can also be

addressed via the area FFFF 0000

advantage that the area can be indirectly addressed by an offset and the

zero base r0.

Therefore, in this manual, all addresses of peripheral I/O registers in the

4 KB peripheral I/O area are given in the range FFFF F000

instead of 03FF F000

The fixed peripheral I/O area is mirrored to the upper 4 KB of the

programmable peripheral I/O area PPA. If data is written to one area, it

appears also in the other area.

Program fetches cannot be executed from any peripheral I/O area.

Word registers, that means 32-bit registers, are accessed in two half word

accesses. The lower two address bits are ignored.

User's Manual U18743EE1V2UM00

CPU System Functions

Address range

and 03FF FFFF

to FFFF FFFF

to 03FF FFFF

. This has the