Chapter 1: Introduction; Overview - Xilinx KCU105 User Manual

Introduction
This document describes the features and functions of the PCI Express® Streaming Data
Plane targeted reference design (TRD). The TRD comprises a base design and a user
extension design. The user extension design adds custom logic on top of the base design.
The pre-built user extension design in this TRD adds an Ethernet application.

Overview

The TRD targets the Kintex® UltraScale™ XCKU040-2FFVA1156E FPGA running on the
KCU105 evaluation board and provides a platform for data transfer between the host
machine and the FPGA. The top-level block diagram of the TRD base design is shown in
Figure 1-1.
X-Ref Target - Figure 1-1
User
App
Figure 1-1: KCU105 PCI Express Streaming Data Plane Base Design
The TRD uses an integrated Endpoint block for PCI Express (PCIe®) in a x8 Gen2
configuration along with an Expresso DMA Bridge Core from Northwest Logic
high performance data transfers between host system memory and the Endpoint (the FPGA
on the KCU105 board).
The DMA bridge core (DMA block) provides protocol conversion between PCIe transaction
layer packets (TLPs) and AXI transactions. The core's hardware scatter gather list (SGL) DMA
interface provides buffers management at the Endpoint to enable the streaming interface.
PCIe Streaming Data Plane TRD
UG920 (v2017.1) June 01, 2017
KCU105 Evaluation Board
XCKU040-2FFVA1156E FPGA
www.xilinx.com
Chapter 1
UG920_c1_01_040615
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